AZ100ELT22D中文资料AZM数据手册PDF规格书

DESCRIPTION

The AZ10/100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of the ELT22 makes it ideal for applications that require the translation of a clock and a data signal.

The ELT22 is available in both PECL standards: the 10ELT is compatible with PECL 10K logic levels while the 100ELT is compatible with PECL 100K logic levels.

NOTE: Specifications in PECL tables are valid when thermal equilibrium is established.

FEATURES

• Green / RoHS Compliant / Lead (Pb) Free package available

• 0.5ns Typical Propagation Delay

• <100ps Typical Output to Output Skew

• Differential PECL Outputs

• Flow Through Pinouts

• Operating Range of 3.0V to 5.5V

• Direct Replacement for ON Semiconductor MC10ELT22, MC100ELT22, MC100LVELT22 & Micrel SY89322V

• IBIS Model Files Available on Arizona Microtek Website