Low Skew Output Buffer

General Description The AV9172 is designed to generate low skew clocks for clock distribution in high-performance PCs and workstations. It uses phase-locked loop technology to align the phase and frequency of the output clocks with an input reference clock. Because the input to output skew is gua

文件：399.05 Kbytes 页数：8 Pages

ICST

Low Skew Output Buffer

General Description The AV9172 is designed to generate low skew clocks for clock distribution in high-performance PCs and workstations. It uses phase-locked loop technology to align the phase and frequency of the output clocks with an input reference clock. Because the input to output skew is gua

文件：399.05 Kbytes 页数：8 Pages

ICST

Low Skew Output Buffer

General Description The AV9172 is designed to generate low skew clocks for clock distribution in high-performance PCs and workstations. It uses phase-locked loop technology to align the phase and frequency of the output clocks with an input reference clock. Because the input to output skew is gua

文件：399.05 Kbytes 页数：8 Pages

ICST

Low Skew Output Buffer

General Description The AV9172 is designed to generate low skew clocks for clock distribution in high-performance PCs and workstations. It uses phase-locked loop technology to align the phase and frequency of the output clocks with an input reference clock. Because the input to output skew is gua

文件：399.05 Kbytes 页数：8 Pages

ICST

Low Skew Output Buffer

General Description The AV9172 is designed to generate low skew clocks for clock distribution in high-performance PCs and workstations. It uses phase-locked loop technology to align the phase and frequency of the output clocks with an input reference clock. Because the input to output skew is gua

文件：399.05 Kbytes 页数：8 Pages

ICST

Low Skew Output Buffer

General Description The AV9172 is designed to generate low skew clocks for clock distribution in high-performance PCs and workstations. It uses phase-locked loop technology to align the phase and frequency of the output clocks with an input reference clock. Because the input to output skew is gua

文件：399.05 Kbytes 页数：8 Pages

ICST

Video Genlock PLL

General Description The AV9173-01 provides the analog circuit blocks required for implementing a video genlock dot (pixel) clock generator. It contains a phase detector, charge pump, loop filter, and voltage-controlled oscillator (VCO). By grouping these critical analog blocks into one IC and uti

文件：148.25 Kbytes 页数：6 Pages

ICST

Video Genlock PLL

General Description The AV9173-01 provides the analog circuit blocks required for implementing a video genlock dot (pixel) clock generator. It contains a phase detector, charge pump, loop filter, and voltage-controlled oscillator (VCO). By grouping these critical analog blocks into one IC and uti

文件：148.25 Kbytes 页数：6 Pages

ICST

Video Genlock PLL

General Description The AV9173-01 provides the analog circuit blocks required for implementing a video genlock dot (pixel) clock generator. It contains a phase detector, charge pump, loop filter, and voltage-controlled oscillator (VCO). By grouping these critical analog blocks into one IC and uti

文件：122.42 Kbytes 页数：7 Pages

ICST

Video Genlock PLL

General Description The AV9173-01 provides the analog circuit blocks required for implementing a video genlock dot (pixel) clock generator. It contains a phase detector, charge pump, loop filter, and voltage-controlled oscillator (VCO). By grouping these critical analog blocks into one IC and uti

文件：148.25 Kbytes 页数：6 Pages

ICST