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Overview

The Atmel® AVR® XMEGA® is a family of low power, high performance, and peripheral rich 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the Atmel AVR XMEGA devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed.

The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in a single instruction, executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs many times faster than conventional single-accumulator or CISC based microcontrollers.

特性 Features

• High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit Microcontroller

• Nonvolatile program and data memories

• 64K - 128KBytes of in-system self-programmable flash

• 4K - 8KBytes boot section

• 2KBytes EEPROM

• 4K - 8KBytes internal SRAM

• Peripheral Features

• Two-channel DMA controller

• Four-channel event system

• Three 16-bit timer/counters

• Two timer/counters with 4 output compare or input capture channels

• One timer/counter with 2 output compare or input capture channels

• High resolution extensions one timer/counter

• Advanced waveform extension (AWeX) on one timer/counter

• Split mode on two timer/counters

• One USB device interface

• USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant

• 32 Endpoints with full configuration flexibility

• Two USARTs with IrDA support for one USART

• AES and DES crypto engine

• CRC-16 (CRC-CCITT) and CRC-32 (IEEE® 802.3) generator

• One two-wire interface with dual address match (I2C and SMBus compatible)

• One serial peripheral interface (SPI)

• 16-bit Real Time Counter (RTC) with separate oscillator

• Liquid Crystal Display

• Up to 4x40 segment driver

• Built in contrast control

• ASCII character mapping

• Flexible SWAP of segment and common terminals buses

• Two eight-channel, 12-bit, 300 thousand SPS Analog to Digital Converters

• Four Analog Comparators with window compare function, and current source feature

• External interrupts on all General Purpose I/O pins

• Programmable watchdog timer with separate on-chip ultra low power oscillator

• QTouch® library support

• Capacitive touch buttons, sliders and wheels

• Special microcontroller features

• Power-on reset and programmable brown-out detection

• Internal and external clock options with PLL

• Programmable multilevel interrupt controller

• Five sleep modes

• Programming and debug interfaces

• JTAG (IEEE 1149.1 Compliant) interface, including boundary scan

• PDI (Program and Debug Interface)

• I/O and Packages

• 53 Programmable I/O pins

• 100-lead TQFP

• Operating Voltage

• 1.6 – 3.6V

• Operating frequency

• 0 – 12MHz from 1.6V

• 0 – 32MHz from 2.7V