ATMEGA4808-AFR中文资料微芯科技数据手册PDF规格书

• AVR CPU

– Single-cycle I/O access

– Two-level interrupt controller

– Two-cycle hardware multiplier

• Memories

– Up to 48 KB In-system self-programmable Flash memory

– 256B EEPROM

– Up to 6 KB SRAM

– Write/Erase endurance:

• Flash 10,000 cycles

• EEPROM 100,000 cycles

– Data retention: 20 Years at 85°C

• System

– Power-on Reset (POR) circuit

– Brown-out Detection (BOD)

– Clock options:

• 20 MHz low power internal oscillator with fuse-protected frequency setting

• 32.768 kHz Ultra Low Power (ULP) internal oscillator

• 32.768 kHz external crystal oscillator

• External clock input

– Single pin Unified Program Debug Interface (UPDI)

– Three sleep modes:

• Idle with all peripherals running and mode for immediate wake-up time

• Standby

– Configurable operation of selected peripherals