AT91SAM9G46集成电路（IC）的微处理器规格书PDF中文资料

描述 Description

The ARM926EJ-S based AT91SAM9G46 features the frequently requested combination of user interface functionality and high data rate connectivity, including LCD Controller, resistive touchscreen, camera interface, audio, Ethernet 10/100 and high speed USB and SDIO. With the processor running at 400MHz and multiple 100+ Mbps data rate peripherals, the AT91SAM9G46 has the performance and bandwidth to the network or local storage media to provide an adequate user experience.

特性 Features

• 400 MHz ARM926EJ-S™ ARM® Thumb® Processor

– 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU

• Memories

– 4-port, 4-bank DDR2/LPDDR Controller

– External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static

Memories, CompactFlash, SLC NAND Flash with ECC

– One 64-KByte internal SRAM, single-cycle access at system speed or processor

speed through TCM interface

– One 64-KByte internal ROM, embedding bootstrap routine

• Peripherals

– LCD Controller supporting STN and TFT displays up to 1280*860

– ITU-R BT. 601/656 Image Sensor Interface

– Dual High Speed USB Host and a High Speed USB Device with On-Chip

Transceivers

– 10/100 Mbps Ethernet MAC Controller

– Two High Speed Memory Card Hosts (SDIO, SDCard, e.MMC and CE ATA)

– AC97 controller

– Two Master/Slave Serial Peripheral Interfaces

– Two Three-channel 16-bit Timer/Counters

– Two Synchronous Serial Controllers (I2S mode)

– Four-channel 16-bit PWM Controller

– Two Two-wire Interfaces

– Four USARTs with ISO7816, IrDA, Manchester and SPI modes

– 8-channel 10-bit ADC with 4-wire Touch Screen support

• Cryptography

– TRNG True Random Number Generator

– AES256-, 192-, 128-bit Key Algorithm,

– TDES Compliant with FIPS PUB 46-3 Specifications

– SHA (SHA1 and SHA256) Compliant with FIPS Publication 180-2

• System

– 133 MHz twelve 32-bit layer AHB Bus Matrix

– 39 DMA Channels

– Boot from NAND Flash, SDCard, DataFlash® or serial DataFlash

– Reset Controller with on-chip Power-on Reset

– Selectable 32768 Hz Low-power and 12 MHz Crystal Oscillators

– Internal Low-power 32 kHz RC Oscillator

– One PLL for the system and one 480 MHz PLL optimized for USB High Speed

– Two Programmable External Clock Signals

– Advanced Interrupt Controller and Debug Unit

– Periodic Interval Timer, Watchdog Timer, Real Time Timer and Real Time Clock

• I/O

– Five 32-bit Parallel Input/Output Controllers

– 160 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os with

Schmitt trigger input

• Package

– 324-ball TFBGA, pitch 0.8 mm