AT6000中文资料Coprocessor Field Programmable Gate Arrays数据手册Microchip规格书

描述 Description

AT6000 Series SRAM-based Field Programmable Gate Arrays (FPGAs) are ideal for use as reconfigurable coprocessors and implementing compute-intensive logic.
Supporting system speeds greater than 100 MHz and using a typical operating current of 15 to 170 mA, AT6000 Series devices are ideal for high-speed, compute-intensive designs. These FPGAs are designed to implement Cache Logic®, which provides the user with the ability to implement adaptive hardware and perform hardware acceleration.
The patented AT6000 Series architecture employs a symmetrical grid of small yet powerful cells connected to a flexible busing network. Independently controlled clocks and resets govern every column of cells. The array is surrounded by programmable I/O.
Devices range in size from 4,000 to 30,000 usable gates, and 1024 to 6400 registers. Pin locations are consistent throughout the AT6000 Series for easy design migration. High-I/O versions are available for the lower gate count devices.

特性 Features

• High-performance
• Up to 204 User I/Os
• Cache Logic® Design
• Low Voltage and Standard Voltage Operation
• Automatic Component Generators
• Very Low-power Consumption
• Programmable Clock Options
• Independently Configurable I/O (PCI Compatible)
• Easy Migration to Atmel Gate Arrays for High Volume Production