AT25XE512C集成电路（IC）的存储器规格书PDF中文资料

特性 Features

 Single 1.65V - 3.6V Supply

 Serial Peripheral Interface (SPI) Compatible

 Supports SPI Modes 0 and 3

 Supports Dual Output Read

 104MHz Maximum Operating Frequency

 Clock-to-Output (tV) of 6 ns

 Flexible, Optimized Erase Architecture for Code + Data Storage Applications

 Small (256-Byte) Page Erase

 Uniform 4-Kbyte Block Erase

 Uniform 32-Kbyte Block Erase

 Full Chip Erase

 Hardware Controlled Locking of Protected Sectors via WP Pin

 128-byte, One-Time Programmable (OTP) Security Register

 64 bytes factory programmed with a unique identifier

 64 bytes user programmable

 Flexible Programming

 Byte/Page Program (1 to 256 Bytes)

 Fast Program and Erase Times

 2ms Typical Page Program (256 Bytes) Time

 50ms Typical 4-Kbyte Block Erase Time

 400ms Typical 32-Kbyte Block Erase Time

 Automatic Checking and Reporting of Erase/Program Failures

 Software Controlled Reset

 JEDEC Standard Manufacturer and Device ID Read Methodology

 Low Power Dissipation

 200nA Ultra Deep Power Down current (Typical)

 4.5µA Deep Power-Down Current (Typical)

 25uA Standby current (Typical)

 3.5mA Active Read Current (Typical)

 Endurance: 100,000 Program/Erase Cycles

 Data Retention: 20 Years

 Temperature Range:-10°C to +85°C (1.65V to 3.6V), -40°C to +85° (1.7V to 3.6V)

 Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

 8-lead SOIC (150-mil)

 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)

 8-lead TSSOP Package

描述 Description

The Adesto® AT25XE512C is a highly optimized ultra-low energy serial interface Flash memory device designed for use in a wide

variety of high-volume low energy consumer and industrial applications. The AT25XE512C device has been optimized by design

to meet the needs of today's connected applications in the Internet of Things market space.

The granular Page Erase and Block Erase architecture allows the memory space to be used much more efficiently supporting

data storage and over the air updates. Key program code subroutines and data storage segments need to reside by themselves

in their own separate erase regions, and with a granular architecture the wasted and unused memory space that occurs with large

sectored and large block erase flash memory devices can be greatly reduced.

The resulting improvement to software efficiency contributes to reduced CPU / MCU overheads that translate to further reduce

the system energy usage levels. The device also contains a specialized OTP (One-Time Programmable) Security Register that

can be used for purposes such as unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key

storage, etc. Specifically designed for use in many different systems, the AT25XE512C supports read, program, and erase

operations with a wide supply voltage range of 1.65V to 3.6V. No separate voltage is required for programming and erasing.