AT24C64A集成电路（IC）的存储器规格书PDF中文资料

Description

The AT24C32A/64A provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common twowire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C32A/64A is available in space saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead Mini-MAP (MLP 2x3) and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.

Features

• Low-Voltage and Standard-Voltage Operation

– 2.7 (VCC = 2.7V to 5.5V)

– 1.8 (VCC = 1.8V to 5.5V)

• Low-Power Devices (ISB = 6 µA @ 5.5V) Available

• Internally Organized 4096 x 8, 8192 x 8

• Two-wire Serial Interface

• Schmitt Trigger, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 400 kHz (1.8V, 2.5V, 2.7V, 5V) Compatibility

• Write Protect Pin for Hardware Data Protection

• 32-byte Page Write Mode (Partial Page Writes Allowed)

• Self-timed Write Cycle (5 ms Max)

• High Reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

• Automotive Devices Available

• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead Mini-MAP (MLP 2x3) and 8-lead TSSOP Packages

• Lead-free/Halogen-free

• Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers