AT24C512C-SSHD-T集成电路（IC）的存储器规格书PDF中文资料

描述 Description

The Atmel® AT24C512C provides 524,288 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 65,536 words of eight bits each. The cascadable feature of the device allows up to eight devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential.

特性 Features

Low-voltage and standard-voltage operation

 1.7V (VCC= 1.7V to 3.6V)

 2.5V (VCC= 2.5V to 5.5V)

Internally organized as 65,536 x 8

2-wire serial interface

Schmitt Triggers, filtered inputs for noise suppression

Bidirectional data transfer protocol

400kHz (1.7V) and 1MHz (2.5V, 5.5V) compatibility

Write Protect pin for hardware data protection

128-byte page write mode

 partial page writes allowed

Random and sequential read modes

Self-timed write cycle (5ms max)

High reliability

 Endurance: 1,000,000 write cycles

 Data retention: 40 years

Green package options (Pb/Halide-free/RoHS Compliant)

 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-pad UDFN, and

8-ball VFBGA packages

Die sale options: wafer form and tape and reel available