AT24C512B-W1.8-11中文资料爱特梅尔数据手册PDF规格书

描述 Description

The AT24C512B provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common two-wire bus. The device is optimized for use inmany industrial and commercial applications where low-power and low-voltage operation are essential.

特性 Features

• Low-voltage and Standard-voltage Operation

– 1.8v (VCC= 1.8V to 3.6V)

– 2.5v (VCC= 2.5V to 5.5V)

• Internally Organized 65,536 x 8

• Two-wire Serial Interface

• Schmitt Triggers, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 1 MHz (2.5V, 5.5V), 400 kHz (1.8V) Compatibility

• Write Protect Pin for Hardware and Software Data Protection

• 128-byte Page Write Mode (Partial Page Writes Allowed)

• Self-timed Write Cycle (5 ms Max)

• High Reliability

– Endurance: 1,000,000 Write Cycles

– Data Retention: 40 Years

• Lead-free/Halogen-free Devices

• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJSOIC, 8-lead TSSOP, 8-ball dBGA2, and 8-lead Ultra Thin Small Array (SAP) Packages

• Die Sales: Wafer Form, Waffle Pack and Bumped Die