AT24C32集成电路（IC）的存储器规格书PDF中文资料

Description

The AT24C32/64 provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C32/64 is available in space saving 8-pin JEDEC PDIP, 8-pin and 14-pin JEDEC SOIC, 8-pin EIAJ SOIC, and 8-pin TSSOP packages and is accessed via a 2-wire serial interface.

In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions.

Features

• Low-Voltage and Standard-Voltage Operation

– 5.0 (VCC = 4.5V to 5.5V)

– 2.7 (VCC = 2.7V to 5.5V)

– 2.5 (VCC = 2.5V to 5.5V)

– 1.8 (VCC = 1.8V to 5.5V)

• Low-Power Devices (ISB = 2 µA @ 5.5V) Available

• Internally Organized 4096 x 8, 8192 x 8

• 2-Wire Serial Interface

• Schmitt Trigger, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility

• Write Protect Pin for Hardware Data Protection

• 32-Byte Page Write Mode (Partial Page Writes Allowed)

• Self-Timed Write Cycle (10 ms max)

• High Reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

– ESD Protection: >3,000V

• Automotive Grade and Extended Temperature Devices Available

• 8-Pin JEDEC PDIP, 8-Pin and 14-Pin JEDEC SOIC, 8-Pin EIAJ SOIC,

and 8-pin TSSOP Packages