AT24C02集成电路（IC）的存储器规格书PDF中文资料

特性 Features

• Low-voltage and Standard-voltage Operation

– 2.7 (VCC = 2.7V to 5.5V)

– 1.8 (VCC = 1.8V to 5.5V)

• Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),

1024 x 8 (8K) or 2048 x 8 (16K)

• Two-wire Serial Interface

• Schmitt Trigger, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility

• Write Protect Pin for Hardware Data Protection

• 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes

• Partial Page Writes Allowed

• Self-timed Write Cycle (5 ms max)

• High-reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

• Automotive Devices Available

• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 5-lead

SOT23, 8-lead TSSOP and 8-ball dBGA2 Packages

• Die Sales: Wafer Form, Waffle Pack and Bumped Wafers

描述 Description

The AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits of serial

electrically erasable and programmable read-only memory (EEPROM) organized as

128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation

are essential. The AT24C01A/02/04/08A/16A is available in space-saving 8-lead

PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 5-lead SOT23

(AT24C01A/AT24C02/AT24C04), 8-lead TSSOP, and 8-ball dBGA2 packages and is

accessed via a Two-wire serial interface. In addition, the entire family is available in

2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions