ASM1187e中文资料PCIE Bridge Controller数据手册ASMedia规格书

描述 Description

ASM1187e, PCI express packet switch, 1 PCIe x1 Gen2 upstream port to 7 PCIe x 1 Gen2 downstream ports, enable users to extend PCIe ports on mother board or embedded system. PCIe interface of ASM1187e is PCIe Base SPEC 2.0 compliance.

特性 Features

• Standard Compliant
  → PCI express base SPEC 2.0 and backward compatible with SEPC 1.1 & 1.0a
  → PCI Power management SPEC 1.2

• Port configuration
  → 1 PCIe x1 lane Gen2 upstream port to 7 PCIe x1 lane Gen2 downstream ports
  → 1 PCIe x1 lane Gen2 upstream port to 1 PCIe x 4 lane + 3 PCIe x1 lane downstream ports

• PCIe power management
  → Link state L0, L0s, L1, L2/L3 Ready and L3
  → Device state D0, D3 hot

• Short latency delay
• Integrate 100MHz PCIe differential clock buffer,no extra clock buffer needed.

• Support I2C interface for debug usage

• 10 x 10 QFN88 RoHS package♦Package Type

• 10 x 10 QFN88