AS7C4096A-10JCN中文资料ALSC数据手册PDF规格书

Functional description

The AS7C4096A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 524,288 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

Features

• Pin compatible to AS7C4096

• Industrial and commercial temperature

• Organization: 524,288 words × 8 bits

• Center power and ground pins

• High speed

- 10/12/15/20 ns address access time

- 5/6 ns output enable access time

• Low power consumption: ACTIVE

- 880mW/max @ 10 ns

• Low power consumption: STANDBY

- 55mW/max CMOS

• Equal access and cycle times

• Easy memory expansion with CE, OE inputs

• TTL-compatible, three-state I/O

• JEDEC standard packages

- 400 mil 36-pin SOJ

- 44-pin TSOP 2

• ESD protection ≥ 2000 volts

• Latch-up current ≥ 200 mA