Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

文件：885.97 Kbytes 页数：10 Pages

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Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

文件：885.97 Kbytes 页数：10 Pages

ALSC

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

文件：885.97 Kbytes 页数：10 Pages

ALSC

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

文件：885.97 Kbytes 页数：10 Pages

ALSC

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

文件：885.97 Kbytes 页数：10 Pages

ALSC

8K X 8 BIT LOW POWER CMOS SRAM

DESCRIPTION\nThe AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes:\n  - Read - Standby\n  - Write - Data Retention\nThe memory array is based on a 6-transistor cell.FEATURES\n 8192 x 8 bit static CMOS RAM\n 70 ns Access Times\n Common data  8192 x 8 bit static CMOS RAM\n 70 ns Access Times\n Common data inputs and outputs\nThree-state outputs\n Typ. operating supply current\n      o 70 ns: 10 mA\nStandby current:\n      o< 2 μA at Ta ≤ 70 °C\n Data retention current at 2 V:\n      o< 1 μA at Ta ≤ 70 °C\nTTL/CMOS-compatible\nA;

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8K x 8 Bit Low Power CMOS SRAM

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联盟记忆

8K x 8 Bit Low Power CMOS SRAM

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联盟记忆

Package：28-DIP（0.600"，15.24mm）；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 64KBIT PARALLEL 28DIP

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Package：28-SOIC（0.330"，8.38mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC SRAM 64KBIT PARALLEL 28SOP

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