AS4LC1M16E5-50JC中文资料ETC数据手册PDF规格书

[Alliance Semiconductor]

Functional description

The AS4LC1M16E5 is a high performance 16-megabit CMOS Dynamic Random Access Memory (DRAM) organized as 1,048,576 words × 16 bits. The device is fabricated using advanced CMOS technology and innovative design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels. The Alliance 16Mb DRAM family is optimized for use as main memory in personal and portable PCs, workstations, and multimedia and router switch applications.

特性 Features

• Organization: 1,048,576 words × 16 bits

• High speed

- 50/60 ns RAS access time

- 20/25 ns hyper page cycle time

- 12/15 ns CAS access time

• Low power consumption

- Active: 500 mW max (-60)

- Standby: 3.6 mW max, CMOS DQ

• Extended data out

• 1024 refresh cycles, 16 ms refresh interval

- RAS-only or CAS-before-RAS refresh or self-refresh

• Read-modify-write

• TTL-compatible, three-state DQ

• JEDEC standard package and pinout

- 400 mil, 42-pin SOJ

- 400 mil, 44/50-pin TSOP II

• 3V power supply (AS4LC1M16E5)

• 5V tolerant I/Os; 5.5V maximum VIH

• Industrial and commercial temperature available