AS21P2TLR数据手册ST中文资料规格书

描述 Description

The AS21P2TLR is a high-speed CMOS single-pole double-throw (SPDT) analog switch or dual 2:1 multiplexer/demultiplexer bus switch fabricated using silicon gate C²MOS technology. Designed to operate from 1.65 to 4.3 V, this device is ideal for portable applications.
It offers very low ON resistance (RON< 0.5 Ω) at VCC= 3.6 V. The nIN inputs are provided to control the independent channel switches nS1 and nS2. The switches nS1 are ON (connected to common ports Dn) when the nIN input is held high and OFF (state of high impedance exists between the two ports) when nIN is held low. The switches nS2 are ON (connected to common ports Dn) when the nIN input is held low and OFF (state of high impedance exists between the two ports) when IN is held high. Additional key features are fast switching speed, break-before-make delay time and ultralow power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD and excess transient voltage immunity.

特性 Features

• Ultra low power dissipation: ICC= 0.2 μA (max.) at TA= 85 °C
• Low ON resistance VIN= 0 V:
• RON= 0.50 Ω (max. TA= 25 °C) at VCC= 4.3 V
• RON= 0.50 Ω (max. TA= 25 °C) at VCC= 3.6 V
• Wide operating voltage range: VCC(OPR) = 1.65 to 4.3 V single supply
• 4.3 V tolerant and 1.8 V compatible threshold on digital control input at VCC= 2.3 to 4.3 V
• Latch-up performance exceeds 300 mA (JESD 17)
• ESD performance: HMB > 2 kV (MIL STD 883 method 3015)