APA450中文资料PDF规格书
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Device Family Overview
The ProASICPLUS family of devices, Actel’s second generation family of flash FPGAs, offers enhanced performance over Actel’s ProASIC family. It combines the advantages of ASICs with the benefits of programmable devices through nonvolatile flash technology.
Features and Benefits
High Capacity
Commercial and Industrial
• 75,000 to 1 Million System Gates
• 27 K to 198 Kbits of Two-Port SRAM
• 66 to 712 User I/Os
Military
• 300, 000 to 1 Million System Gates
• 72 K to 198 Kbits of Two Port SRAM
• 158 to 712 User I/Os
Reprogrammable Flash Technology
• 0.22 µm 4 LM Flash-Based CMOS Process
• Live At Power-Up (LAPU) Level 0 Support
• Single-Chip Solution
• No Configuration Device Required
• Retains Programmed Design during Power-Down/Up Cycles
• Mil/Aero Devices Operate over Full Military Temperature Range
Performance
• 3.3 V, 32-Bit PCI, up to 50 MHz (33 MHz over military temperature)
• Two Integrated PLLs
• External System Performance up to 150 MHz
Secure Programming
• The Industry’s Most Effective Security Key (FlashLock®)
Low Power
• Low Impedance Flash Switches
• Segmented Hierarchical Routing Structure
• Small, Efficient, Configurable (Combinatorial or Sequential) Logic Cells
High Performance Routing Hierarchy
• Ultra-Fast Local and Long-Line Network
• High-Speed Very Long-Line Network
• High-Performance, Low Skew, Splittable Global Network
• 100 Routability and Utilization
I/O
• Schmitt-Trigger Option on Every Input
• 2.5 V / 3.3 V Support with Individually-Selectable Voltage and Slew Rate
• Bidirectional Global I/Os
• Compliance with PCI Specification Revision 2.2
• Boundary-Scan Test IEEE Std. 1149.1 (JTAG) Compliant
• Pin-Compatible Packages across the ProASICPLUS Family
Unique Clock Conditioning Circuitry
• PLL with Flexible Phase, Multiply/Divide, and Delay Capabilities
• Internal and/or External Dynamic PLL Configuration
• Two LVPECL Differential Pairs for Clock or Data Inputs
Standard FPGA and ASIC Design Flow
• Flexibility with Choice of Industry-Standard Front-End Tools
• Efficient Design through Front-End Timing and Gate Optimization
ISP Support
• In-System Programming (ISP) via JTAG Port
SRAMs and FIFOs
• SmartGen Netlist Generation Ensures Optimal Usage of Embedded Memory Blocks
• 24 SRAM and FIFO Configurations with Synchronous and Asynchronous Operation up to 150 MHz (typical)
产品属性
- 产品编号:
APA450-PQG208I
- 制造商:
Microchip Technology
- 类别:
集成电路(IC) > FPGA(现场可编程门阵列)
- 系列:
ProASICPLUS
- 包装:
托盘
- 电压 - 供电:
2.3V ~ 2.7V
- 安装类型:
表面贴装型
- 工作温度:
-40°C ~ 85°C(TA)
- 封装/外壳:
208-BFQFP
- 供应商器件封装:
208-PQFP(28x28)
- 描述:
IC FPGA 158 I/O 208QFP
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ACTEL |
1040+ |
BGA |
2 |
进口原装现货 |
询价 | ||
22+ |
BGA |
2140 |
全新原装!现货特价供应 |
询价 | |||
Microsemi/美高森美 |
22+ |
BGA144 |
2897 |
只做原装自家现货供应! |
询价 | ||
ACTEL |
22+23+ |
BGA |
25480 |
绝对原装正品全新进口深圳现货 |
询价 | ||
Microsemi Corporation |
21+ |
208-BFQFP |
10080 |
100%进口原装!长期供应!绝对优势价格(诚信经营) |
询价 | ||
ACTEL |
20+/21+ |
SMD |
8472 |
全新原装进口价格优势 |
询价 | ||
MICR0SEMI |
21+ |
50000 |
全新原装正品现货,支持订货 |
询价 | |||
ACTEL/爱特 |
21+ |
SMD |
19800 |
一站式BOM配单 |
询价 | ||
ACTEL |
BGA |
320 |
正品原装--自家现货-实单可谈 |
询价 | |||
ACTEL |
20+ |
BGA |
35830 |
原装优势主营型号-可开原型号增税票 |
询价 |
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