AM7968-125DKC中文资料TAXIchip™ Integrated Circuits (Transparent Asynchronous Xmitter-Receiver Interface)数据手册AMD规格书

描述 Description

GENERAL DESCRIPTION
The Am7968 TAXIchip Transmitter and Am7969 TAXIchip Receiver Chipset is a general-purpose interface for very high-speed (4–17.5 Mbyte/s, 40–175 Mbaud serially) point-to-point communications over coaxial or fiber-optic media. The TAXIchip set emulates a pseudo-parallel register. They load data into one side and output it on the other, except in this case, the “other” side is separated by a long serial link.
The speed of a TAXIchip system is adjustable over a range of frequencies, with parallel bus transfer rates of 4 Mbyte/s at the low end, and up to 17.5 Mbyte/s at the high end. The flexible bus interface scheme of the TAXIchip set accepts bytes that are either 8, 9, or 10 bits wide. Byte transfers can be Data or Command signaling.DISTINCTIVE CHARACTERISTICS
■ Parallel TTL bus interface
   — Eight Data and four Command Pins
   — or nine Data and three Command Pins
   — or ten Data and two Command Pins
■ Transparent synchronous serial link
   — +5 V ECL Serial I/O
   — AC or DC coupled
   — NRZI 4B/5B, 5B/6B encoding/decoding
■ Drive coaxial cable or twisted pair directly
■ Easy interface with fiber optic data links
■ 32–140 Mbps (4–17.5 Mbyte/s) data throughput
■ Asynchronous input using STRB/ACK
■ Automatic MUX/DEMUX of Data and Command
■ Complete on-chip PLL, Crystal Oscillator
■ Single +5 V supply operation
■ 28-pin PLCC or DIP or LCC