AM29F016D中文资料超威半导体数据手册PDF规格书

GENERAL DESCRIPTION

The Am29F016D is a 16 Mbit, 5.0 volt-only Flash memory organized as 2,097,152 bytes. The 8 bits of data appear on DQ0–DQ7. The Am29F016D is offered in 48-pin TSOP, 40-pin TSOP, and 44-pin SO packages. The device is also available in Known Good Die (KGD) form. For more information, refer to publication number 21551. This device is designed to be programmed in-system with the standard system 5.0 volt VCC supply. A 12.0 volt VPP is not required for program or erase operations. The device can also be programmed in standard EPROM programmers.

DISTINCTIVE CHARACTERISTICS

■ 5.0 V ± 10, single power supply operation

— Minimizes system level power requirements

■ Manufactured on 0.23 µm process technology

— Compatible with 0.5 µm Am29F016 and 0.32 µm Am29F016B devices

■ High performance

— Access times as fast as 70 ns

■ Low power consumption

— 25 mA typical active read current

— 30 mA typical program/erase current

— 1 µA typical standby current (standard access time to active mode)

■ Flexible sector architecture

— 32 uniform sectors of 64 Kbytes each

— Any combination of sectors can be erased

— Supports full chip erase

— Group sector protection:

A hardware method of locking sector groups to prevent any program or erase operations within that sector group

Temporary Sector Group Unprotect allows code changes in previously locked sectors

■ Embedded Algorithms

— Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

— Embedded Program algorithm automatically writes and verifies bytes at specified addresses

■ Unlock Bypass Program Command

— Reduces overall programming time when issuing multiple program command sequences

■ Minimum 1,000,000 program/erase cycles per sector guaranteed

■ 20-year data retention at 125°C

— Reliable operation for the life of the system

■ Package options

— 48-pin and 40-pin TSOP

— 44-pin SO

— Known Good Die (KGD) (see publication number 21551)

■ Compatible with JEDEC standards

— Pinout and software compatible with single-power-supply Flash standard

— Superior inadvertent write protection

■ Data# Polling and toggle bits

— Provides a software method of detecting program or erase cycle completion

■ Ready/Busy# output (RY/BY#)

— Provides a hardware method for detecting program or erase cycle completion

■ Erase Suspend/Erase Resume

— Suspends a sector erase operation to read data from, or program data to, a non-erasing sector, then resumes the erase operation

■ Hardware reset pin (RESET#)

— Resets internal state machine to the read mode