AM186ES/AM188ES中文资料High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers数据手册AMD规格书

描述 Description

GENERAL DESCRIPTION
The Am186ES/ESLV and Am188ES/ESLV microcontrollers are an ideal upgrade for 80C186/188 and 80L186/188 microcontroller designs requiring 80C186/188 and 80L186/188 compatibility, increased performance, serial communications, and a direct bus interface. The Am186ES/ESLV and Am188ES/ESLV microcontrollers are part of the AMD E86 family of embedded microcontrollers and microprocessors based on the x86 architecture. The E86 family includes the 16- and 32-bit
microcontrollers and microprocessors described on page 8.DISTINCTIVE CHARACTERISTICS
E86™ family 80C186-/188- and 80L186-/188-compatible microcontrollers with enhanced bus
interface
— Lower system cost with higher performance
— 3.3-V ±0.3-V operation (Am186ESLV and Am188ESLV microcontrollers)
High performance
— 20-, 25-, 33-, and 40-MHz operating frequencies
— Supports zero-wait-state operation at 25 MHz with 100-ns static memory (Am186ESLV and Am188ESLV microcontrollers) and 40 MHz with 70-ns static memory (Am186ES and Am188ES
microcontrollers)
— 1-Mbyte memory address space
— 64-Kbyte I/O space
Enhanced features provide improved memory ccess and remove the requirement for a 2x clock
input
— Nonmultiplexed address bus
— Processor operates at the clock input frequency
— On the Am186ES/ESLV microcontroller, 8-bit or 16-bit memory and I/O static bus option
Enhanced integrated peripherals provide increased functionality, while reducing system cost
— Thirty-two programmable I/O (PIO) pins
— Two full-featured asynchronous serial ports allow full-duplex, 7-bit, 8-bit, or 9-bit data transfers
— Serial port hardware handshaking with CTS, RTS, ENRX, and RTRselectable for each port
— Multidrop 9-bit serial port protocol
— Independent serial port baud rate generators
— DMA to and from the serial ports
— Watchdog timer can generate NMI or reset
— A pulse-width demodulation option
— A data strobe, true asynchronous bus interface option included for DEN
— Pseudo static RAM (PSRAM) controller includes auto refresh capability
— Reset configuration register
Familiar 80C186/80L186 peripherals
— Two independent DMA channels
— Programmable interrupt controller with up to eight external and eight internal interrupts
— Three programmable 16-bit timers
— Programmable memory and peripheral chip-select logic
— Programmable wait state generator
— Power-save clock divider
Software-compatible with the 80C186/80L186 and 80C188/80L188 microcontrollers with widely
available native development tools, applications, and system software
A compatible evolution of the Am186EM and Am188EM microcontrollers
Available in the following packages:
— 100-pin, thin quad flat pack (TQFP)
— 100-pin, plastic quad flat pack (PQFP)