AKD4588中文资料旭化成微电子数据手册PDF规格书

GENERAL DESCRIPTION

The AK4588 is a single chip CODEC that includes two channels of ADC and eight channels of DAC. The ADC outputs 24bit data and the DAC accepts up to 24bit input data. The ADC has the Enhanced Dual Bit architecture with wide dynamic range. The DAC introduces the new developed Advanced Multi-Bit architecture, and achieves wider dynamic range and lower outband noise. The AK4588 has a dynamic range of 102dB for ADC, 106dB for DAC and is well suited for digital surround for home theater and car audio. The AK4588 also has the balance volume control corresponding to the Dolby Digital (AC-3) system.

The also has digital audio receiver (DIR) and transmitter (DIT) compatible with 192kHz, 24bits. The DIR has 8-channel input selector and can automatically detect a Non-PCM bit stream. The AK4588 provides a fully compatibility of hardware and software with the AK4628 and the AK4114.

FEATURES

□ ADC/DAC part

□ 2ch 24bit ADC

- 64x Oversampling

- Sampling Rate up to 96kHz

- Linear Phase Digital Anti-Alias Filter

- Single-Ended Input

- S/(N+D): 92dB

- Dynamic Range, S/N: 102dB

- Digital HPF for offset cancellation

- Overflow flag

□ 8ch 24bit DAC

- 128x Oversampling

- Sampling Rate up to 192kHz

- 24bit 8 times Digital Filter

- Single-Ended Outputs

- On-chip Switched-Capacitor Filter

- S/(N+D): 90dB

- Dynamic Range, S/N: 106dB

- Individual channel digital volume with 128 levels and 0.5dB step

- Soft mute

- Zero Detect Function

□ High Jitter Tolerance

□ Extenal Master Clock Input:

- 256fs, 384fs, 512fs (fs=32kHz ∼ 48kHz)

- 128fs, 192fs, 256fs (fs=64kHz ∼ 96kHz)

- 128fs (fs=120kHz ∼ 192kHz)

□ DIR/DIT Part

□ AES3, IEC60958, S/PDIF, EIAJ CP1201 Compatible

□ Low jitter Analog PLL

□ PLL Lock Range : 32kHz to 192kHz

□ Clock Source: PLL or Xtal

□ 8-channel Receiver input

□ 2-channel Transmission output (Through output or DIT)

□ Auxiliary digital input

□ De-emphasis for 32kHz, 44.1kHz, 48kHz and 96kHz

□ Detection Functions

- Non-PCM Bit Stream Detection

- DTS-CD Bit Stream Detection

- Sampling Frequency Detection

(32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz)

- Unlock & Parity Error Detection

- Validity Flag Detection

□ Up to 24bit Audio Data Format

□ Audio I/F: Master or Slave Mode

□ 40-bit Channel Status Buffer

□ Burst Preamble bit Pc and Pd Buffer for Non-PCM bit stream

□ Q-subcode Buffer for CD bit stream

□ Serial µP I/F

□ Two Master Clock Outputs: 64fs/128fs/256fs/512fs

□ TTL Level Digital I/F

□ 4-wire Serial and I2C Bus µP I/F for mode setting

□ Operating Voltage: 4.5 to 5.5V with 5V tolerance

□ Power Supply for output buffer: 2.7 to 5.5V

□ 80pin LQFP Package (0.5mm pitch)