AiP74LVC138数据手册I-CORE中文资料规格书

描述 Description

The AiP74LVC138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y(—)0 to Y(—)7) that are LOW when selected.There are three enable inputs: two active LOW (E(—)1 and E(—)2) and one active HIGH (E3). Every output will be HIGH unless E(—)1 and E(—)2 are LOW and E3 is HIGH.This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four AiP74LVC138 devices and one inverter. The AiP74LVC138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.

特性 Features

• 5V tolerant inputs/outputs for interfacing with 5V logic
• Wide supply voltage range from 1.2V to 3.6V
• CMOS low power consumption
• Direct interface with TTL levels
• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Mutually exclusive outputs
• Specified from -40℃ to +125℃
• Packaging information: DIP16/SOP16/TSSOP16/DHVQFN16

应用 Application

• 家用电器
• 工业控制
• 新能源