AiP74HCT192数据手册I-CORE中文资料规格书

描述 Description

The AiP74HC/HCT192 is a synchronous BCD up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD is held HIGH, the device will count up. If the CPD clock is pulsed while CPU is held HIGH, the device will count down. Only one clock input can be held HIGH at any time to guarantee predictable behavior. The device can be cleared at any time by the asynchronous master reset input (MR); it may also be loaded in parallel by activating the asynchronous parallel load input (PL(—)).

特性 Features

•Input levels:
• For AiP74HC192: CMOS level
• For AiP74HCT192: TTL level
•Synchronous reversible counting
•Asynchronous parallel load
•Asynchronous reset
•Expandable without external logic
•Specified from -40℃ to +125℃
•Packaging information: DIP16/SOP16/TSSOP16

应用 Application

• 家用电器
• 工业控制
• 新能源