AFE3256_V01中文资料德州仪器数据手册PDF规格书

1 Features

• 256 channels

• On-chip, 16-bit ADC

• High performance:

– Noise: 440 electrons RMS

(1.2-pC input charge range)

– Low correlated noise

– Full-channel integral nonlinearity:

±2 LSB at 16 bit

– Scan time: < 16 μs to 204.8 μs

• Integration:

– Programmable full-scale input charge range:

0.3pC to 12.5pC with resolution of 0.3pC

– Internal timing generator (TG)

– Built-in correlated double sampler

– Software programmable electron or hole

integration mode

– Pipelined integrate-and-read for improved

throughput—data-read during integration

– Serial LVDS output

– On-chip temperature sensor

• Simple power supply scheme:

– Single 1.85V power supply operation

• Multiple power modes with power consumption

ranging from 1mW/ch to 2mW/ch

• Power-down modes: sleep and standby

• Binning mode support

• Custom chip-on-film (COF) packages

2 Applications

• Flat-panel, X-ray detectors

• Charge detectors

• Capacitance measurement

3 Description

The AFE3256 is a 256-channel, analog front-end

(AFE) designed to suit the requirements of flat-panel

detector (FPD) based digital X-ray systems. The

device includes 256 integrators, correlated double

samplers (CDSs) with dual banking, and 256:2 analog

multiplexers. The device also features two 16-bit

successive-approximation register (SAR) analog-todigital

converters (ADCs). Serial data from the ADCs

are available in low-voltage differential signaling

(LVDS) format.

The device, also commonly referred to as a readout

integrated circuit (ROIC), optimizes the overall system

performance using features such as multiple power

modes and in-system debug options.

The sleep and standby modes enable substantial

power saving which is critical for battery-powered

systems.