High Performance SHARC-FX DSP Core High Performance SHARC-FX DSP Core

SYSTEM FEATURES SHARC-FX high performance floating-point core 256-bit vector size Peak performance at 1 GHz core frequency: 24 GFLOPS, 8 GMAC (32-bit float), 16 GMAC (16-bit fixed) 64/512 kB L1 instruction/data RAM with ECC 32/256 kB L1 instruction/data cache with ECC Arm Cortex-M33 connect

文件：3.59574 Mbytes 页数：124 Pages

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Up to 800 MHz SHARC®-FX DSP w/ Integrated Arm® Cortex®-M33

The ADSP-2183x digital signal processors (DSPs) are members of the SHARC® family of products, featuring the next-generation SHARC-FX DSP core offering processing speeds of up to 1 GHz coupled with up to 2 MB of L2 memory for low-latency applications. For applications requiring enhanced connectivity SHARC-FX Core Infrastructure\n• 600 MHz (max) or 800 MHz (max) Core clock frequency\n\n• 64/512 KB on-chip Level 1 (L1) Instruction/Data SRAM (with ECC) increases low latency performance\n\n• 32/256 KB on-chip Level 1 (L1) Instruction/Data cache memory (with ECC)\n\n• 256-bit SIMD, 4-way VLIW with l;

ADI

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High Performance SHARC-FX DSP Core High Performance SHARC-FX DSP Core

SYSTEM FEATURES SHARC-FX high performance floating-point core 256-bit vector size Peak performance at 1 GHz core frequency: 24 GFLOPS, 8 GMAC (32-bit float), 16 GMAC (16-bit fixed) 64/512 kB L1 instruction/data RAM with ECC 32/256 kB L1 instruction/data cache with ECC Arm Cortex-M33 connect

文件：3.59574 Mbytes 页数：124 Pages

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High Performance SHARC-FX DSP Core High Performance SHARC-FX DSP Core

SYSTEM FEATURES SHARC-FX high performance floating-point core 256-bit vector size Peak performance at 1 GHz core frequency: 24 GFLOPS, 8 GMAC (32-bit float), 16 GMAC (16-bit fixed) 64/512 kB L1 instruction/data RAM with ECC 32/256 kB L1 instruction/data cache with ECC Arm Cortex-M33 connect

文件：3.59574 Mbytes 页数：124 Pages

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High Performance SHARC-FX DSP Core High Performance SHARC-FX DSP Core

SYSTEM FEATURES SHARC-FX high performance floating-point core 256-bit vector size Peak performance at 1 GHz core frequency: 24 GFLOPS, 8 GMAC (32-bit float), 16 GMAC (16-bit fixed) 64/512 kB L1 instruction/data RAM with ECC 32/256 kB L1 instruction/data cache with ECC Arm Cortex-M33 connect

文件：3.59574 Mbytes 页数：124 Pages

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