ADSP-BF512集成电路（IC）的DSP（数字信号处理器）规格书PDF中文资料

ADSP-BF512属于集成电路（IC）的DSP（数字信号处理器）。由亚德诺半导体技术有限公司制造生产的ADSP-BF512DSP（数字信号处理器）数字信号处理器是类似于微处理器或微控制器的器件，但区别在于其内部架构经修改，适用于对连续数据流连续执行以乘法和加法运算为主的算法，而不是以条件逻辑或大量并发进程为主的算法。该器件通常用于诸如音频或视频信号处理等应用。

GENERAL DESCRIPTION

The ADSP-BF512/ADSP-BF512F, ADSP-BF514/ADSPBF514F, ADSP-BF516/ADSP-BF516F, ADSP-BF518/ADSPBF518F processors are members of the Blackfin® family of products, incorporating the Analog Devices/Intel Micro Signal Architecture (MSA). Blackfin processors combine a dual-MAC state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture.

FEATURES

Up to 400 MHz high performance Blackfin processor

Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,

40-bit shifter

RISC-like register and instruction model for ease of

programming and compiler-friendly support

Advanced debug, trace, and performance monitoring

Wide range of operating voltages. See Operating Conditions

on Page 20

Qualified for Automotive Applications. See Automotive

Products on Page 65

168-ball CSP_BGA or 176-lead LQFP with exposed pad

MEMORY

116K bytes of on-chip memory

External memory controller with glueless support for SDRAM

and asynchronous 8-bit and 16-bit memories

Optional 4M bit SPI flash with boot option

Flexible booting options from internal SPI flash, OTP

memory, external SPI/parallel memories, or from SPI/UART

host devices

Code security with Lockbox secure technology

One-time-programmable (OTP) memory

Memory management unit providing memory protection

PERIPHERALS

IEEE 802.3-compliant 10/100 Ethernet MAC with IEEE 1588

support (ADSP-BF518/ADSP-BF518F only)

Parallel peripheral interface (PPI), supporting ITU-R 656

video data formats

2 dual-channel, full-duplex synchronous serial ports

(SPORTs), supporting 8 stereo I2S channels

12 peripheral DMAs, 2 mastered by the Ethernet MAC

2 memory-to-memory DMAs with external request lines

Event handler with 56 interrupt inputs

2 serial peripheral interfaces (SPI)

Removable storage interface (RSI) controller for MMC, SD,

SDIO, and CE-ATA

2 UARTs with IrDA support

2-wire interface (TWI) controller

Eight 32-bit timers/counters with PWM support

3-phase 16-bit center-based PWM unit

32-bit general-purpose counter

Real-time clock (RTC) and watchdog timer

32-bit core timer

40 general-purpose I/Os (GPIOs)

Debug/JTAG interface

On-chip PLL capable of frequency multiplication