ADSP-2196MKST-160X中文资料亚德诺数据手册PDF规格书

GENERAL DESCRIPTION

The ADSP-2196 DSP is a single-chip microcomputer optimized for digital signal processing (DSP) and other high speed numeric processing applications.

The ADSP-2196 combines the ADSP-219x family base architecture (three computational units, two data address generators, and a program sequencer) with three serial ports, two SPI-compatible ports, one UART port, a DMA controller, three programmable timers, general-purpose Programmable Flag pins, extensive interrupt capabilities, and on-chip program and data memory spaces.

ADSP-219x DSP CORE FEATURES

6.25 ns Instruction Cycle Time (Internal), for up to

160 MIPS Sustained Performance

ADSP-218x Family Code Compatible with the Same

Easy -to-Use Algebraic Syntax

Single-Cycle Instruction Execution

Up to 16M words of Addressable Memory Space with

24 Bits of Addressing Width

Dual Purpose Program Memory for Both Instruction and

Data Storage

Fully Transparent Instruction Cache Allows Dual

Operand Fetches in Every Instruction Cycle

Unified Memory Space Permits Flexible Address

Generation, Using Two Independent DAG Units

Independent ALU, Multiplier/Accumulator, and Barrel

Shifter Computational Units with Dual 40-bit

Accumulators

Single-Cycle Context Switch between Two Sets of

Computational and DAG Registers

Parallel Execution of Computation and Memory

Instructions

Pipelined Architecture Supports Efficient Code

Execution at Speeds up to 160 MIPS

Register File Computations with All Nonconditional,

Nonparallel Computational Instructions

Powerful Program Sequencer Provides Zero-Overhead

Looping and Conditional Instruction Execution

Architectural Enhancements for Compiled C

Code Efficiency