ADS8900BRGER集成电路（IC）的模数转换器（ADC）规格书PDF中文资料

ADS8900BRGER属于集成电路（IC）的模数转换器（ADC）。由德州仪器制造生产的ADS8900BRGER模数转换器（ADC）模数转换器（ADC、A/D 或 A 转 D）对模拟信号进行采样，例如由麦克风采集的声音或传感器的输出，然后将其转换为数字信号。一般来说，数字输出是二进制补码二进制数，与输入成比例。输入类型可能是差分、伪差分或单端输入。模数转换器可按照位数、采样率、输入数、接口、转换器数和架构（例如自适应增量、双斜率、折叠、流水线、SAR、三角积分、两步式）进行选择。

1 Features

1• Resolution: 20-Bits

• High Sample Rate With No Latency Output:

– ADS8900B: 1-MSPS

– ADS8902B: 500-kSPS

– ADS8904B: 250-kSPS

• Integrated LDO Enables Low-Power, Single-

Supply Operation

• Low Power Reference Buffer with No Droop

• Excellent AC and DC Performance:

– SNR: 104.5-dB, THD: –125-dB

– DNL: ±0.2-ppm, 20-Bit No-Missing-Codes

– INL: ±1-ppm

• Wide Input Range:

– Unipolar Differential Input Range: ±VREF

– VREF Input Range: 2.5-V to 5-V

• Enhanced-SPI Digital Interface

– Interface SCLK : 22-MHz at 1-MSPS.

– Configurable Data Parity Output.

• Extended Temperature Range: –40°C to +125°C

• Small Footprint: 4-mm × 4-mm VQFN

2 Applications

• Test and Measurement

• Medical Imaging

• High-Precision, High-Speed Data Acquisition

3 Description

The ADS8900B, ADS8902B, and ADS8904B

(ADS890xB) belong to a family of pin-to-pin

compatible, high-speed, single-channel, highprecision,

20-bit successive-approximation-register

(SAR) analog-to-digital converters (ADCs) with an

integrated reference buffer and integrated lowdropout

regulator (LDO). The device family includes

the ADS891xB (18-bit) and ADS892xB (16-bit)

resolution variants.

The ADS89xxB boosts analog performance while

maintaining high-resolution data transfer by using TI’s

Enhanced-SPI feature. Enhanced-SPI enables

ADS89xxB in achieving high throughput at lower

clock speeds, there by simplifying the board layout

and lowering system cost. Enhanced-SPI also

simplifies the host’s clocking-in of data there by

making it ideal for applications involving FPGAs,

DSPs. ADS89xxB is compatible with standard SPI

Interface.

The ADS89xxB has an internal data parity feature

which can be appended to the ADC data output. ADC

data validation by the host, using parity bits, improves

system reliability.