ADS6124中文资料12 位、105MSPS 模数转换器 (ADC)数据手册TI规格书

描述 Description

ADS6125/ADS6124/ADS6123/ADS6122 (ADS612X) is a family of 12-bit A/D converters with sampling frequencies up to 125 MSPS. It combines high performance and low power consumption in a compact 32 QFN package. Using an internal high bandwidth sample and hold and a low jitter clock buffer helps to achieve high SNR and high SFDR even at high input frequencies. It features coarse and fine gain options that are used to improve SFDR performance at lower full-scale analog input ranges.The digital data outputs are either parallel CMOS or DDR LVDS (Double Data Rate). Several features exist to ease data capture such as — controls for output clock position and output buffer drive strength, and LVDS current and internal termination programmability. The output interface type, gain, and other functions are programmed using a 3-wire serial interface. Alternatively, some of these functions are configured using dedicated parallel pins so that the device comes up in the desired state after power-up. ADS612X includes internal references, while eliminating the traditional reference pins and associated external decoupling. External reference mode is also supported.The devices are specified over the industrial temperature range (-40°C to 85°C).

特性 Features

• Maximum Sample Rate: 125 MSPS
• 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR/SFDR Trade-Off
• Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Clock Amplitude Down to 400 mVPP
• Internal Reference with Support for External Reference
• Programmable Output Clock Position and Drive Strength to Ease Data Capture
• 32-QFN Package (5 mm × 5 mm)
• APPLICATIONS
• Software Defined Radio
• 802.16d/e
• High Definition Video
• Radar Systems