ADS4616A4A-5中文资料威刚科技数据手册PDF规格书

General Description

The ADS4616A4A are two-bank Synchronous DRAMs organized as 524,288 words x 16 bits x 2 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.

特性 Features

• Single 3.3V +/- 0.3V power supply

• MRS Cycle with address key programs

    -CAS Latency (2 & 3)

    -Burst Length (1,2,4,8, & full page)

    -Burst Type (sequential & Interleave)

• 2 banks operation

• All inputs are sampled at the positive edge of the system clock

• Burst Read single write operation

• Auto & Self refresh

• 4096 refresh cycle

• DQM for masking

• Package:50-pins 400 mil TSOP-Type II