ADS131M02-Q1数据手册TI中文资料规格书

描述 Description

The ADS131M02-Q1 is a two-channel, simultaneously sampling, 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) that offers wide dynamic range and low power, making the device designed for automotive battery management systems (BMS). The ADC inputs can be directly interfaced to shunt resistors for bidirectional battery-current measurements, to resistor-divider networks for high-voltage measurements, or to temperature sensors (such as thermistors or analog output temperature sensors).

The individual ADC channels can be independently configured depending on the sensor input. A low-noise, programmable gain amplifier (PGA) provides gains ranging from 1 to 128 to amplify low-level signals. Additionally, this device integrates channel-to-channel phase calibration and offset and gain calibration registers to help remove signal-chain errors.

A low-drift, 1.2-V reference is integrated into the device, reducing printed circuit board (PCB) area. Optional cyclic redundancy checks (CRCs) on the data input, data output, and register map maintain communication integrity.

The complete analog front-end (AFE) is offered in a 20-pin TSSOP package and is specified over the automotive temperature range of –40°C to +125°C.

特性 Features

• AEC-Q100 qualified for automotive applications:
• Temperature grade 1: –40°C to +125°C, TA

• Functional Safety-Capable
• Documentation available to aid functional safety system design

• 2 simultaneously sampling differential inputs
• Programmable data rate up to 64 kSPS
• Programmable gain up to 128
• Noise performance:
• 102-dB dynamic range at gain = 1, 4 kSPS
• 80-dB dynamic range at gain = 64, 4 kSPS

• Total harmonic distortion: –100 dB
• High-impedance inputs for direct sensor connection:
• 330-kΩ input impedance for gains of 1, 2, and 4
• ≥1-MΩ input impedance for gains of 8, 16, 32, 64, and 128

• Programmable channel-to-channel phase delay calibration:
• Resolution = 244 ns, fCLKIN = 8.192 MHz

• Fast start-up: First data within 0.5 ms of supply ramp
• Integrated negative charge pump allows input signals below ground
• Crosstalk between channels: –120 dB
• Low-drift internal voltage reference
• Cyclic redundancy check (CRC) on communications and register map
• Analog and digital supplies: 2.7 V to 3.6 V
• Low-power consumption: 2.3 mW at 3-V AVDD and DVDD
• Package: 20-pin TSSOP