ADPL62933UKD+T中文资料亚德诺数据手册PDF规格书

General Description

The ADPL62933 is an ultra-low-current (200nA, typ) microprocessor (μP) supervisory circuit that combines voltage monitoring, watchdog timer, and manual reset input functions in a 5- pin SOT23 package. This device asserts a reset signal whenever the monitored voltage drops below the factory-trimmed reset threshold voltage, manual reset is asserted, or the watchdog timer expires. The reset output remains asserted for a minimum timeout period after VCC rises above the reset threshold and manual reset is deasserted. Factory-trimmed reset threshold voltages are offered from +1.575V to +4.625V in approximately 100mV increments (see the Table 1). Each device is offered with six minimum reset timeout options, ranging from 10ms to 1200ms.

The ADPL62933 offers a watchdog timer that monitors activity at the WDI input to prevent code execution errors. It also offers watchdog timeout options of 3.3s or 209s (typ). Open-drain, active-low reset outputs is available.

Applications

● Portable/Battery-Powered Equipment

● PDAs/Cell Phones

● MP3 Players/Pagers

● Glucose Monitors/Patient Monitors

特性 Features

● Ultra-Low 170nA (typ) Supply Current

● Reset Thresholds from +1.575V to +4.625V in Approximately 100mV Increments

● Six Minimum Reset Timeout Period Options from 10ms to 1200ms

● Manual Reset Option

● Watchdog Timer Option

● Immune to Short VCC Transients

● Guaranteed Reset Valid to VCC = +1.1V

● Open-Drain RESET Output

● No External Components

● Small 5-Pin SOT23 Package