3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

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LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

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3 V、LVDS、四通道、CMOS差分线路接收器

ADN4666是一款四通道、CMOS、低压差分信号(LVDS)线路接收器，提供400 Mbps (200 MHz)以上的数据速率，功耗超低。\n\n      该器件接受低压（典型值350 mV）差分输入信号，并将其转换为单端3 V TTL/ CMOS逻辑电平。\n\n        ADN4666还提供高电平有效和低电平有效使能/禁用输入（EN和EN)，用来控制所有四个接收器。这些输入可禁用接收器，将输出切换至高阻抗状态。因此，一个或多个ADN4666器件的输出可以多路复用，将静态功耗降至典型值10 mW。\n\n     ADN4666及其配套驱动器ADN46 • 接收器输入引脚提供±8 kV ESD IEC 61000-4-2接触放电保护\n\n• 转换速率：400 Mbps (200 MHz)\n\n• 通道间偏斜：100 ps（典型值）\n\n• 差分偏斜：100 ps（典型值）;

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

文件：262.3 Kbytes 页数：12 Pages

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

文件：262.3 Kbytes 页数：12 Pages

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

文件：262.3 Kbytes 页数：12 Pages

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3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

文件：262.3 Kbytes 页数：12 Pages

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Package：16-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/4 16TSSOP

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Package：16-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/4 16SOIC

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Package：16-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 驱动器，接收器，收发器 描述：IC RECEIVER 0/4 16SOIC

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