ADL5391ACPZ-WP中文资料亚德诺数据手册PDF规格书

GENERAL DESCRIPTION

The ADL5391 draws on three decades of experience in advanced analog multiplier products. It provides the same general mathematical function that has been field proven to provide an exceptional degree of versatility in function synthesis.

FEATURES

Ultrafast symmetric multiplier

Function: VW = α × (VX × VY)/1 V + VZ

Unique design ensures absolute XY-symmetry

Identical X and Y amplitude/timing responses

Adjustable gain scaling, α

DC-coupled throughout, 3 dB bandwidth of 2 GHz

Fully differential inputs, may be used single ended

Low noise, high linearity

Accurate, temperature stable gain scaling

Single-supply operation (4.5 V to 5.5 V at 130 mA)

Low current power-down mode

16-lead LFCSP

APPLICATIONS

Wideband multiplication and summing

High frequency analog modulation

Adaptive antennas (diversity/phased array)

Square-law detectors and true rms detectors

Accurate polynomial function synthesis

DC capable VGA with very fast control