4.5 Ω RON, 1.8 V Logic-Compatible Quad SPDT Switch

GENERAL DESCRIPTION The ADG1534 contains four independent SPDT switches. An EN input on the ADG1534 is used to enable or disable the device. When disabled, all channels are high impedance. The digital inputs, INx, are 1.8 V logic-compatible and suitable for low voltage logic controls. The AD

文件：567.47 Kbytes 页数：15 Pages

AD

亚德诺

4.5 Ω RON, 1.8 V Logic-Compatible Quad SPDT Switch

GENERAL DESCRIPTION The ADG1534 contains four independent SPDT switches. An EN input on the ADG1534 is used to enable or disable the device. When disabled, all channels are high impedance. The digital inputs, INx, are 1.8 V logic-compatible and suitable for low voltage logic controls. The AD

文件：567.47 Kbytes 页数：15 Pages

AD

亚德诺

4.7 廓 RON, Quad SPDT Switch with 1.2 V and 1.8 V JEDEC Logic Compliance

GENERAL DESCRIPTION The ADG1634L is a monolithic industrial CMOS (iCMOS®) analog switch comprising four independently selectable single-pole, double- throw (SPDT) switches, respectively. All channels exhibit break-before-make switching action that prevents momentary shorting when switching ch

文件：873.59 Kbytes 页数：22 Pages

AD

亚德诺

4.7 廓 RON, Quad SPDT Switch with 1.2 V and 1.8 V JEDEC Logic Compliance

GENERAL DESCRIPTION The ADG1634L is a monolithic industrial CMOS (iCMOS®) analog switch comprising four independently selectable single-pole, double- throw (SPDT) switches, respectively. All channels exhibit break-before-make switching action that prevents momentary shorting when switching ch

文件：873.59 Kbytes 页数：22 Pages

AD

亚德诺

Low Voltage, 2.4Ω Quad SPST Switch

FEATURES ► ±1.08V to ±2.75V dual supply ► +1.08V to +5.5V single supply ► Low on resistance 2.4Ω ► 16-lead, 2mm × 2mm LGA ► 1.8 V and 3 V JEDEC compliant logic ► Fully specified at ±5V,+3.3V, +1.8V, and ±2.5V ► Rail-to-rail signal range ► −40 °C to +125 °C operating temperature range

文件：990.97 Kbytes 页数：24 Pages

AD

亚德诺

Low Voltage, 2.4Ω Quad SPST Switch

FEATURES ► ±1.08V to ±2.75V dual supply ► +1.08V to +5.5V single supply ► Low on resistance 2.4Ω ► 16-lead, 2mm × 2mm LGA ► 1.8 V and 3 V JEDEC compliant logic ► Fully specified at ±5V,+3.3V, +1.8V, and ±2.5V ► Rail-to-rail signal range ► −40 °C to +125 °C operating temperature range

文件：990.97 Kbytes 页数：24 Pages

AD

亚德诺

Low Voltage, 2.4Ω Dual SPDT Switch in 2mm × 2mm LGA Package

FEATURES ► ±1.08V to ±2.75V dual supply ► +1.08V to +5.5V single supply ► Low on resistance 2.4Ω ► 16-lead, 2mm × 2mm LGA ► 1.8V and 3V JEDEC compliant logic ► Fully specified at +5V, +3.3V, +1.8V, and ±2.5V ► Rail-to-rail signal range ► −40°C to +125°C operating temperature range

文件：1.294 Mbytes 页数：27 Pages

AD

亚德诺

Low Voltage, 2.4Ω Dual SPDT Switch in 2mm × 2mm LGA Package

FEATURES ► ±1.08V to ±2.75V dual supply ► +1.08V to +5.5V single supply ► Low on resistance 2.4Ω ► 16-lead, 2mm × 2mm LGA ► 1.8V and 3V JEDEC compliant logic ► Fully specified at +5V, +3.3V, +1.8V, and ±2.5V ► Rail-to-rail signal range ► −40°C to +125°C operating temperature range

文件：1.294 Mbytes 页数：27 Pages

AD

亚德诺

Low Capacitance, Low Charge Injection

文件：398.47 Kbytes 页数：16 Pages

AD

亚德诺

Low Capacitance, Low Charge Injection, 짹15 V/12 V, 4:1 iCMOS Multiplexer

文件：398.47 Kbytes 页数：16 Pages

AD

亚德诺