Low Phase Noise, Fast Settling PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4193 frequency synthesizer can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations. It cons

文件：590.92 Kbytes 页数：28 Pages

AD

亚德诺

低相位噪声、快速建立PLL频率合成器

ADF4193频率合成器可以用来在无线接收机和发射机的上变频和下变频部分实现本振，其结构经过特别设计，符合基站的GSM/EDGE锁定时间要求。它由低噪声数字鉴频鉴相器(PFD)和精密差分电荷泵组成。还有一个差分放大器，用来将电荷泵的差分输出转换为外部电压控制振荡器(VCO)的单端电压。\n\n Σ-Δ型小数插值器与N分频器一起使用，能够实现可编程模数小数N分频。此外，4位参考(R)分频器和片内倍频器允许PFD输入端的参考信号(REFIN)频率为可选值。如果频率合成器与外部环路滤波器和VCO一起使用，则可以实现完整的锁相环(PLL)。开关结构确保PLL能在GSM时隙保护期间内建立，而无 • 新型快速建立小数N分频PLL结构\n• 单个PLL可取代乒乓式频率合成器\n• 在5 µs内完成整个GSM频段上的跳频，相位建立时间为20 µs\n• 相位误差：0.5°均方根值（2 GHz RF输出）\n• 数字可编程输出相位;

ADI

亚德诺

Low Phase Noise, Fast Settling PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4193 frequency synthesizer can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations. It cons

文件：590.92 Kbytes 页数：28 Pages

AD

亚德诺

Low Phase Noise, Fast Settling PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4193 frequency synthesizer can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations. It cons

文件：590.92 Kbytes 页数：28 Pages

AD

亚德诺

Low Phase Noise, Fast Settling PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4193 frequency synthesizer can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations. It cons

文件：590.92 Kbytes 页数：28 Pages

AD

亚德诺

Low Phase Noise, Fast Settling PLL Frequency Synthesizer

文件：922.08 Kbytes 页数：32 Pages

AD

亚德诺

Package：32-WFQFN 裸露焊盘，CSP；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL FREQ SYNTHESIZER 32LFCSP

AD

亚德诺

Package：32-WFQFN 裸露焊盘，CSP；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL FREQ SYNTHESIZER 32LFCSP

AD

亚德诺

Package：32-WFQFN 裸露焊盘，CSP；包装：托盘 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL FREQ SYNTHESIZER 32LFCSP

AD

亚德诺