丝印：ADF；Package：TSOP-6；Low Power Offline Constant Current PWM Current-Mode Controller with/without High Voltage Startup Current Source

The NCP1361/66 offers a new solution targeting output power levels from a few watts up to 20 W in a universal−mains flyback application. Due to a novel method this new controller offers a primary−side constant current control, saving secondary−side components to perform current regulation. Th

文件：584.01 Kbytes 页数：29 Pages

ONSEMI

安森美半导体

7/16 DIN FEMALE CRIMP CONNECTOR MAY VARY FOR LMR600

ELECTRICAL: IMPEDANCE: 50OHM FREQUENCY RANGE: DC~6 GHz INSERTION LOSS: .2 dB MAX. WORKING VOLTAGE: 2700 VRMS MAX. DIELECTRIC WITHSTANDING VOLTAGE: 4000 VRMS MIN. (AT SEA LEVEL) PACKAGING COMPONENT SHALL BE INDIVIDUALLY PACKAGED IN ACCORDANCE WITH L-COM SPECIFICATION PKG-00012

文件：33.04 Kbytes 页数：1 Pages

L-COM

英飞畅

200 MHz Clock Generator PLL

GENERAL DESCRIPTION The ADF4001 clock generator can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, and a programmable

文件：190.66 Kbytes 页数：16 Pages

AD

亚德诺

200 MHz Clock Generator PLL

GENERAL DESCRIPTION The ADF4001 clock generator can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, and a programmable

文件：190.66 Kbytes 页数：16 Pages

AD

亚德诺

50 MHz to 1000 MHz Quadrature Demodulator

GENERAL DESCRIPTION The AD8348 is a broadband quadrature demodulator with an integrated intermediate frequency (IF), variable gain amplifier (VGA), and integrated baseband amplifiers. It is suitable for use in communications receivers, performing quadrature demodulation from IF directly to baseba

文件：929.43 Kbytes 页数：28 Pages

AD

亚德诺

50 MHz to 1000 MHz Quadrature Demodulator

GENERAL DESCRIPTION The AD8348 is a broadband quadrature demodulator with an integrated intermediate frequency (IF), variable gain amplifier (VGA), and integrated baseband amplifiers. It is suitable for use in communications receivers, performing quadrature demodulation from IF directly to baseba

文件：929.43 Kbytes 页数：28 Pages

AD

亚德诺

200 MHz Clock Generator PLL

GENERAL DESCRIPTION The ADF4001 clock generator can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, and a programmable

文件：190.66 Kbytes 页数：16 Pages

AD

亚德诺

10-Channel Precision Synchronizer

FEATURES ► 10 BSYNC channels ► Precise BSYNC time alignment (

文件：2.27907 Mbytes 页数：86 Pages

AD

亚德诺

10-Channel Precision Synchronizer

FEATURES ► 10 BSYNC channels ► Precise BSYNC time alignment (

文件：2.27907 Mbytes 页数：86 Pages

AD

亚德诺

10-Channel Precision Synchronizer

FEATURES ► 10 BSYNC channels ► Precise BSYNC time alignment (

文件：2.27907 Mbytes 页数：86 Pages

AD

亚德诺