ADC3910D125数据手册TI中文资料规格书

描述 Description

The ADC3910Dx and ADC3910Sx are a family ultra-low power 10-bit 125 MSPS high-speed single and dual channel analog-to-digital converters. High-speed control loops benefit from the short latency of only 1 clock cycle. The ADC consumes only 92 mW at 125 Msps with a power consumption that scales with lower sampling rates.

The device uses DDR, HDDR, SDR or serial CMOS interface to output the data from +1.8V to +3.3V to accommodate various receiver requirements. The device implements analog monitoring function by event triggered interrupts per channel using a digital comparator with programmable high and low thresholds, hysteresis, and event counter. The device is a pin-to-pin compatible family of ADCs with 8 and 10-bit resolution and different speed grades. The device is available in a 32-pin VQFN package, and supports industrial temperature range from -40 to +105°C.

特性 Features

Sampling rate up to 125MSPS

Latency: 1 clock cycle

Low power (2 ch.):

92 mW at 125 MSPS

59 mW at 25 MSPS

4 mW in PD mode



Small footprint: 32-VQFN (4mm x 4 mm)

Single or dual channel ADC

Dual digital comparators

Reference: internal or external

No missing codes, ±1 LSB INL

Buffered, differential or single ended inputs

Input bandwidth: 150 MHz (3-dB)

Single 1.8 V supply

Optional 3.3VIO capability



Industrial temperature range: -40 to 105°C

On-chip digital filter (optional)

Decimation by 2, 4, 8, 16



Parallel (SDR, DDR) and serial CMOS interface

Spectral performance (fIN = 5 MHz):

SNR: 61 dBFS

SFDR: 65 dBc