ADC34RF52中文资料德州仪器数据手册PDF规格书

1 Features

• 14-Bit, Quad channel 1.5-GSPS ADC

• Noise spectral density:

– -153 dBFS/Hz without averaging

– -156 dBFS/Hz with 2x averaging

• Single core (non-interleaved) ADC architecture

• Aperture jitter: 50 fs

• Low close-in residual phase noise:

– -133 dBc/Hz at 10 kHz offset

• Spectral performance (fIN = 900 MHz, -4 dBFS):

– 2x internal averaging

– SNR: 65.2 dBFS

– SFDR HD2,3: 74 dBc

– SFDR worst spur: 90 dBFS

• Input fullscale: 1.0/1.1Vpp (1/1.8 dBm)

• Full power input bandwidth (-3 dB): 1.6 GHz

• JESD204B serial data interface

– Maximum lane rate: 13 Gbps

– Supports subclass 1 deterministic latency

• Digital down-converters

– Up to two DDC per ADC channel

– Complex output: 4x to 128x decimation

– 48-bit NCO phase coherent frequency hopping

– Fast frequency hopping: < 1 μs

• Power consumption: 0.73 W/channel (1x AVG)

• Power supplies: 1.8 V, 1.2 V