ADC1412D集成电路（IC）的模数转换器（ADC）规格书PDF中文资料

1. General description

The ADC1412D is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for

high dynamic performance and low power consumption at sample rates up to 125 Msps.

Pipelined architecture and output error correction ensure the ADC1412D is accurate

enough to guarantee zero missing codes over the entire operating range. Supplied from a

single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in Complementary

Metal Oxide Semiconductor (CMOS) mode because of a separate digital output supply. It

supports the Low Voltage Differential Signalling (LVDS) Double Data Rate (DDR) output

standard. An integrated Serial Peripheral Interface (SPI) allows the user to easily

configure the ADC. The device also includes an programmable full-scale SPI to allow a

flexible input voltage range of 1 V (p-p) to 2 V (p-p). With excellent dynamic performance

from the baseband to input frequencies of 170 MHz or more,

2. Features and benefits

 SNR, 72.1 dBFS  Input bandwidth, 600 MHz

 SFDR, 86 dBc  Power dissipation, 855 mW at 80 Msps

 Sample rate up to 125 Msps  Serial Peripheral Interface (SPI)

 Clock input divided by 2 to reduce jitter

contribution

 Duty cycle stabilizer

 Single 3 V supply  Fast OuT-of-Range (OTR) detection

 Flexible input voltage range:

1 V to 2 V (p-p)

 Offset binary, two’s complement, gray

code

 CMOS or LVDS DDR digital outputs  Power-down and Sleep modes

 Pin and software compatible with

ADC1212D series and ADC1112D125

 HVQFN64 package