丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

丝印：ADC12V170；Package：WQFN；ADC12V170 12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation • Power-Down and Sleep Modes • Offset Binary or 2's Complement O

文件：821.31 Kbytes 页数：34 Pages

TI

德州仪器

12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

文件：562.79 Kbytes 页数：22 Pages

NSC

国半

12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs

文件：564.69 Kbytes 页数：22 Pages

NSC

国半