ADC12QJ800中文资料具有 JESD204C 接口的四通道 12 位 800MSPS 模数转换器 (ADC)数据手册TI规格书

描述 Description

ADC12xJ800 is a family of quad, dual and single channel, 12-bit, 800 MSPS analog-to-digital converters (ADC). Low power consumption, high sampling rate and 12-bit resolution makes the ADC12xJ800 ideally suited for a variety of multi-channel communications and test systems.

Full-power input bandwidth (-3 dB) of 6 GHz enables direct RF sampling of of L-band and S-band.

特性 Features

• ADC Core:
• Maximum sampling rate: 800 MSPS
• Internal dither reduces high-order harmonics
• Performance specifications (–1 dBFS):
• ENOB (97 MHz): 9.0 Bits
• Noise floor (–20 dBFS): –146.1 dBFS/Hz
• Full-scale input voltage: 800 mVPP-DIFF
• JESD204C Serial data interface:
• Maximum baud-rate: 17.16 Gbps
• Subclass-1 support for deterministic latency
• Optional internal sampling clock generation
• SYSREF Windowing eases synchronization
• Reference clocks for FPGA or adjacent ADC
• Timestamp input and output for pulsed systems
• Quad Channel: 415 mW / channel
• Single channel: 830 mW
• Power supplies: 1.1 V, 1.9 V