ADAU1463-300中文资料Sigma DSP, Digital Audio Processor with Increased I2S Flexibility数据手册ADI规格书

描述 Description

The ADAU1463/ADAU1467 are automotive qualified audio processors that far exceed the digital signal processing capabilities of earlier SigmaDSP® devices. They are codecompatible with each other, as well as theADAU1450/ADAU1451/ADAU1452 SigmaDSP® processors. The restructured hardware architecture is optimized for efficient audio processing. The audio processing algorithms support a seamless combination of stream processing (sample-by-sample), multi-rate processing, and block processing paradigms. The graphical programming tool, SigmaStudio™ enables the creation of signal processing flows that are interactive, intuitive and powerful. The enhanced digital signal processor (DSP) core architecture enables some types of audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency.
The 1.2 V, 32-bit DSP core can run at frequencies of up to 294.912 MHz and execute up to 6144 instructions per sample at the standard sample rate of 48 kHz. Powerful clock generator hardware, including a flexible PLL with multiple fractional integer outputs supports all industry standard audio sample rates, non-standard rates over a wide range can generate up to 15 sample rates simultaneously. These clock generators, along with the on board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1463/ADAU1467 ideal audio hubs that greatly simplify the design of complex multirate audio systems.
The ADAU1463/ADAU1467 have four input serial ports and four output serial ports. Each has a fully asynchronous clock domain capable of operating as either clock master or slave. In addition, each serial port supports multiple data lines. Each of the eight pins SDATAIO pin may be associated with any of the four input or four output serial ports. Serial ports with multiple data pins use a single bit clock and frame clock to transmit or receive additional channels of audio data. This allows more channels of audio I/O without the need to run serial ports at high speeds. It also enables serial audio communication with multiple synchronous peripherals. The additional data pins can carry from two to eight channels. These expanded serial audio ports, along with the clock generators, the on board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1463/ADAU1467 ideal audio hubs that greatly simplify the design of complex multirate audio systems.
The ADAU1463/ADAU1467 interface with a wide range of ADCs, DACs, digital audio devices, amplifiers, and control circuitry with highly configurable serial ports, I2C, SPI, S/PDIF interfaces, and multipurpose input/output pins. Dedicateddecimation filters can decode the PDM output of up to four MEMS microphones.
The ADAU1463/ADAU1467 have independent I2C/SPI slave and master control ports. This allows them both to be programmed and controlled by an external master device such as a microcontroller, and program and control slave peripherals directly. Self-boot functionality and the master control port enable complex standalone systems.
Applications

特性 Features

Qualified for automotive applications
High performance SigmaDSP core enables low latency and audio applicationsActive Noise Cancellation (ANC)
Echo-Canceller and Noise Reduction (ECNR)
Surround sound algorithms

Increased I/O compared to ADAU1462
Scalability is achieved with a cost effective 150 MHz DSP core and a 300 MHz DSP core for demanding applications.
Features SigmaStudio, a proprietary graphical Integrated Development Environment (IDE), for the development of custom signal flowsComprehensive Toolbox of pre-defined building blocks
Faster design time with proven solutions
Intuitive system design

32-bit SigmaDSP core at 1.2 V with 294MHz or 147MHz core frequency16 kWords of program memory
48 kWords of parameter/data RAM
Up to 6144 SIMD instructions per sample at 48 kHz
Up to 800 ms digital audio delay pool at 48 kHz

Audio I/O and routing4 serial input ports, 4 serial output ports with assignable parallel data pins (up to 32 serial data pins total)
48-channel, 32-bit digital I/O up to a sample rate of 192 kHz
Flexible configuration of I2S, left and right justified, and up to 16-channel TDM formats on serial data pins
8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB dynamic range
Stereo S/PDIF input and output at 192 kHz
Four PDM microphone input channels
Multichannel, byte addressable TDM serial ports

Clock oscillator for generating master clock from crystal
Integer PLL and flexible clock generators
Integrated die temperature sensor
I2C and SPI control interfaces (both slave and master)
Standalone operationSelf-boot from serial EEPROM
8-channel, 10-bit SAR auxiliary control ADC
26 multipurpose pins for digital controls and outputs

On-chip regulator for generating 1.2 V from 1.8 V to 3.3 V supply
88-lead, 12 mm × 12 mm LFCSP package with 6 mm exposed pad
Temperature range: −40°C to +105°C
 

应用 Application

Automotive audio processingHead units
Navigation systems
Rear seat entertainment systems
DSP amplifiers (sound system amplifiers)