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AD9776-EB中文资料Dual 12-/14-/16-Bit, 1 GSPS, Digital-to-Analog Converters数据手册ADI规格书

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厂商型号

AD9776-EB

功能描述

Dual 12-/14-/16-Bit, 1 GSPS, Digital-to-Analog Converters

制造商

ADI Analog Devices

中文名称

亚德诺 亚德诺半导体技术有限公司

数据手册

下载地址下载地址二

更新时间

2025-9-21 19:15:00

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AD9776-EB规格书详情

描述 Description

GENERAL DESCRIPTION
The AD9776/AD9778/AD9779 are dual, 12-/14-/16-bit, high dynamic range, digital-to-analog converters (DACs) that provide a sample rate of 1 GSPS, permitting multicarrier generation up to the Nyquist frequency. They include features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators such as the AD8349. A serial peripheral interface (SPI®) provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 10 mA to 30 mA. The devices are manufactured on an advanced 0.18 μm CMOS process and operate on 1.8 V and 3.3 V supplies for a total power consumption of 1.0 W. They are enclosed in 100-lead TQFP packages.FEATURES
   Low power: 1.0 W @ 1 GSPS, 600 mW @ 500 MSPS,
      full operating conditions
   SFDR = 78 dBc to fOUT = 100 MHz
   Single carrier WCDMA ACLR = 79 dBc @ 80 MHz IF
   Analog output: adjustable 8.7 mA to 31.7 mA,
      RL = 25 Ω to 50 Ω
   Novel 2×, 4×, and 8× interpolator/coarse complex modulator
      allows carrier placement anywhere in DAC bandwidth
   Auxiliary DACs allow control of external VGA and offset control
   Multiple chip synchronization interface
   High performance, low noise PLL clock multiplier
   Digital inverse sinc filter
   100-lead, exposed paddle TQFP packageAPPLICATIONS
   Wireless infrastructure
      WCDMA, CDMA2000, TD-SCDMA, WiMax, GSM
   Digital high or low IF synthesis
   Internal digital upconversion capability
   Transmit diversity
   Wideband communications: LMDS/MMDS, point-to-point

特性 Features

   Low power: 1.0 W @ 1 GSPS, 600 mW @ 500 MSPS,
      full operating conditions
   SFDR = 78 dBc to fOUT = 100 MHz
   Single carrier WCDMA ACLR = 79 dBc @ 80 MHz IF
   Analog output: adjustable 8.7 mA to 31.7 mA,
      RL = 25 Ω to 50 Ω
   Novel 2×, 4×, and 8× interpolator/coarse complex modulator
      allows carrier placement anywhere in DAC bandwidth
   Auxiliary DACs allow control of external VGA and offset control
   Multiple chip synchronization interface
   High performance, low noise PLL clock multiplier
   Digital inverse sinc filter
   100-lead, exposed paddle TQFP package

应用 Application

Wireless infrastructure
      WCDMA, CDMA2000, TD-SCDMA, WiMax, GSM
   Digital high or low IF synthesis
   Internal digital upconversion capability
   Transmit diversity
   Wideband communications: LMDS/MMDS, point-to-point

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