AD9653BCPZ-125中文资料亚德诺数据手册PDF规格书

GENERAL DESCRIPTION

The AD9653 is a quad, 16-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

FEATURES

1.8 V supply operation

Low power: 164 mW per channel at 125 MSPS

SNR = 76.5 dBFS at 70 MHz (2.0 V p-p input span)

SNR = 77.5 dBFS at 70 MHz (2.6 V p-p input span)

SFDR = 90 dBc (to Nyquist, 2.0 V p-p input span)

DNL = ±0.7 LSB; INL = ±3.5 LSB (2.0 V p-p input span)

Serial LVDS (ANSI-644, default) and low power, reduced range option (similar to IEEE 1596.3)

650 MHz full power analog bandwidth

2 V p-p input voltage range (supports up to 2.6 V p-p)

Serial port control

Full chip and individual channel power-down modes

Flexible bit orientation

Built-in and custom digital test pattern generation

Multichip sync and clock divider

Programmable output clock and data alignment

Standby mode

APPLICATIONS

Medical ultrasound and MRI

High speed imaging

Quadrature radio receivers

Diversity radio receivers

Test equipment