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AD9548SLASHPCBZ中文资料亚德诺数据手册PDF规格书

AD9548SLASHPCBZ
厂商型号

AD9548SLASHPCBZ

功能描述

Quad/Octal Input Network Clock Generator/Synchronizer

文件大小

1.87658 Mbytes

页面数量

112

生产厂商 Analog Devices
企业简称

AD亚德诺

中文名称

亚德诺半导体技术有限公司官网

原厂标识
数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-5-25 11:16:00

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AD9548SLASHPCBZ规格书详情

GENERAL DESCRIPTION

The AD9548 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9548 generates an output clock synchronized to one of up to four differential or eight single-ended external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The AD9548 continuously generates a clean (low jitter), valid output clock even when all references have failed by means of a digitally controlled loop and holdover circuitry.

The AD9548 operates over an industrial temperature range of −40°C to +85°C.

FEATURES

Supports Stratum 2 stability in holdover mode

Supports reference switchover with phase build-out

Supports hitless reference switchover

Auto/manual holdover and reference switchover

4 pairs of reference input pins with each pair configurable as

a single differential input or as 2 independent single-ended inputs

Input reference frequencies from 1 Hz to 750 MHz

Reference validation and frequency monitoring (1 ppm)

Programmable input reference switchover priority

30-bit programmable input reference divider

4 pairs of clock output pins with each pair configurable as a

single differential LVDS/LVPECL output or as 2 single-ended CMOS outputs

Output frequencies up to 450 MHz

30-bit integer and 10-bit fractional programmable feedback

divider

Programmable digital loop filter covering loop bandwidths

from 0.001 Hz to 100 kHz

Optional low noise LC-VCO system clock multiplier

Optional crystal resonator for system clock input

On-chip EEPROM to store multiple power-up profiles

Software controlled power-down

88-lead LFCSP package

APPLICATIONS

Network synchronization

Cleanup of reference clock jitter

GPS 1 pulse per second synchronization

SONET/SDH clocks up to OC-192, including FEC

Stratum 2 holdover, jitter cleanup, and phase transient

control

Stratum 3E and Stratum 3 reference clocks

Wireless base station controllers

Cable infrastructure

Data communications

供应商 型号 品牌 批号 封装 库存 备注 价格
专营ADI
24+
QFN
9600
原装现货,优势供应,支持实单!
询价
ADI
21+
QFN
12588
原装正品,自己库存 假一罚十
询价
AD
24+
LFCSP
80000
只做自己库存,全新原装进口正品假一赔百,可开13%增
询价
ADI/亚德诺
23+
QFN
3000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
询价
ADI(亚德诺)/LINEAR
2447
LFCSP-64
315000
260个/托盘一级代理专营品牌!原装正品,优势现货,长
询价
Analog
21+
25000
原厂原包 深圳现货 主打品牌 假一赔百 可开票!
询价
ADI/亚德诺
23+
LFCSP64
50000
全新原装正品现货,支持订货
询价
ADI/亚德诺
22+
66900
原封装
询价
Analog
24+
64LFCSP
2660
优势现货
询价
ADI(亚德诺)
23+
NA
20094
正纳10年以上分销经验原装进口正品做服务做口碑有支持
询价