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AD9524BCPZ-REEL7集成电路(IC)的应用特定时钟/定时规格书PDF中文资料

| 厂商型号 |
AD9524BCPZ-REEL7 |
| 参数属性 | AD9524BCPZ-REEL7 封装/外壳为48-VFQFN 裸露焊盘,CSP;包装为管件;类别为集成电路(IC)的应用特定时钟/定时;产品描述:IC INTEGER-N CLCK GEN 48LFCSP |
| 功能描述 | Jitter Cleaner and Clock Generator with 6 Differential or 13 LVCMOS Outputs |
| 封装外壳 | 48-VFQFN 裸露焊盘,CSP |
| 文件大小 |
925.83 Kbytes |
| 页面数量 |
56 页 |
| 生产厂商 | AD |
| 中文名称 | 亚德诺 |
| 网址 | |
| 数据手册 | |
| 更新时间 | 2025-10-30 17:08:00 |
| 人工找货 | AD9524BCPZ-REEL7价格和库存,欢迎联系客服免费人工找货 |
AD9524BCPZ-REEL7规格书详情
AD9524BCPZ-REEL7属于集成电路(IC)的应用特定时钟/定时。由亚德诺半导体技术有限公司制造生产的AD9524BCPZ-REEL7应用特定时钟/定时专用时钟和计时 IC(集成电路)产品族中的产品主要用于执行与时间或频率信息生成和分配相关的各种操作,适合的设计环境较特定,例如 AMD 和 Intel 的中央处理单元 (CPU) 或图形处理单元 (GPU)、DVD 音频设备、蓝光光盘播放器、以太网设备、PCIe、SATA、光纤通道接口、车载娱乐总线等。
GENERAL DESCRIPTION
The AD9524 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 3.6 GHz to 4.0 GHz. The AD9524 is defined to support the clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive low phase noise require ments necessary for acceptable data converter SNR performance.
FEATURES
Output frequency: <1 MHz to 1 GHz
Start-up frequency accuracy: <±100 ppm (determined by VCXO reference accuracy)
Zero delay operation
Input-to-output edge timing: <±150 ps
6 outputs: configurable LVPECL, LVDS, HSTL, and LVCMOS
6 dedicated output dividers with jitter-free adjustable delay
Adjustable delay: 63 resolution steps of ½ period of VCO output divider
Output-to-output skew: <±50 ps
Duty-cycle correction for odd divider settings
Automatic synchronization of all outputs on power-up
Absolute output jitter: <200 fs at 122.88 MHz
Integration range: 12 kHz to 20 MHz
Distribution phase noise floor: −160 dBc/Hz
Digital lock detect
Nonvolatile EEPROM stores configuration settings
SPI- and I²C-compatible serial control port
Dual PLL architecture
PLL1
Low bandwidth for reference input clock cleanup with external VCXO
Phase detector rate of 300 kHz to 75 MHz
Redundant reference inputs
Auto and manual reference switchover modes
Revertive and nonrevertive switching
Loss of reference detection with holdover mode
Low noise LVCMOS output from VCXO used for RF/IF synthesizers
PLL2
Phase detector rate of up to 250 MHz
Integrated low noise VCO
APPLICATIONS
LTE and multicarrier GSM base stations
Wireless and broadband infrastructure
Medical instrumentation
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
Low jitter, low phase noise clock distribution
Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols
Forward error correction (G.710)
High performance wireless transceivers
ATE and high performance instrumentation
产品属性
更多- 产品编号:
AD9524BCPZ-REEL7
- 制造商:
Analog Devices Inc.
- 类别:
集成电路(IC) > 应用特定时钟/定时
- 包装:
管件
- PLL:
是
- 主要用途:
以太网,光纤通道,SONET/SDH
- 输入:
CMOS
- 输出:
HSTL,LVCMOS,LVDS,LVPECL
- 比率 - 输入:
2:6
- 差分 - 输入:
是/是
- 频率 - 最大值:
1GHz
- 电压 - 供电:
1.71V ~ 3.465V
- 工作温度:
-40°C ~ 85°C
- 安装类型:
表面贴装型
- 封装/外壳:
48-VFQFN 裸露焊盘,CSP
- 供应商器件封装:
48-LFCSP-VQ(7x7)
- 描述:
IC INTEGER-N CLCK GEN 48LFCSP
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ADI |
25+ |
LFCSP48 |
3000 |
原厂原装,价格优势 |
询价 | ||
ADI/亚德诺 |
2450+ |
LFCSP |
9850 |
只做原装正品现货或订货假一赔十! |
询价 | ||
ADI/亚德诺 |
16+ |
LFCSP-48 |
83 |
原装现货 |
询价 | ||
ADI(亚德诺) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
询价 | ||
ADI/亚德诺 |
21+ |
LFCSP |
1500 |
询价 | |||
ADI/亚德诺 |
25+ |
LFCSP48 |
348 |
原装正品,欢迎来电咨询! |
询价 | ||
ADI/亚德诺 |
19+ |
LFCSP |
880000 |
明嘉莱只做原装正品现货 |
询价 | ||
ADI/亚德诺 |
24+ |
LFCSP |
30000 |
代理原装现货,价格优势。 |
询价 | ||
Analog |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
ADI |
24+ |
48-Lead LFCSP (7mm x 7mm w/ EP |
3660 |
十年信誉,只做全新原装正品现货,以优势说话 !! |
询价 |

