AD9500中文资料Digitally Programmable Delay Generator数据手册ADI规格书

描述 Description

The AD9500 is a digitally programmable delay generator, whichprovides programmed delays, selected through an 8-bit digitalcode, in resolutions as small as 10 ps. The AD9500 is constructedin a high performance bipolar process, designed to providehigh speed operation for both digital and analog circuits.The AD9500 employs differential TRIGGER and RESET inputswhich are designed primarily for ECL signal levels butfunction with analog and TTL input levels. An onboard ECLreference midpoint allows both of the inputs to be driven by eithersingle ended or differential ECL circuits. The AD9500 outputis a complementary ECL stage, which also provides a QRparallel output circuit to facilitate reset timing implementations.The digital control data is passed to the AD9500 through atransparent latch controlled by the LATCH ENABLE signal. Inthe transparent mode, the internal DAC of the AD9500 will attemptto follow changes at the inputs. The LATCH ENABLE isotherwise used to strobe the digital data into the AD9500latches. The AD9500 is available as an industrial temperature range device,-25°C to +85°C, and as an extended temperature rangedevice, -55°C to +125°C. Both grades are packaged in a 24-pinceramic \"Skinny\" DIP (0.3\" package width), as well as 28-pinsurface mount packages. The AD9500 is available in versionscompliant with MIL-STD-883. Refer to the Analog DevicesMilitary Products Databook or current AD9500/883B datasheet for detailed specifications.