AD9430/PCB-CMOS中文资料亚德诺数据手册PDF规格书

GENERAL DESCRIPTION

The AD9430 is a 12-bit, monolithic, sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The product operates up to a 210 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and reference, are included on the chip to provide a complete conversion solution.

FEATURES

SNR = 65 dB @ fIN = 70 MHz @ 210 MSPS

ENOB of 10.6 @ fIN = 70 MHz @ 210 MSPS (–0.5 dBFS)

SFDR = 80 dBc @ fIN = 70 MHz @ 210 MSPS (–0.5 dBFS)

Excellent linearity:

DNL = ±0.3 LSB (typical)

INL = ±0.5 LSB (typical)

2 output data options:

Demultiplexed 3.3 V CMOS outputs each @ 105 MSPS

Interleaved or parallel data output option

LVDS at 210 MSPS

700 MHz full-power analog bandwidth

On-chip reference and track-and-hold

Power dissipation = 1.3 W typical @ 210 MSPS

1.5 V input voltage range

3.3 V supply operation

Output data format option

Data sync input and data clock output provided

Clock duty cycle stabilizer

APPLICATIONS

Wireless and wired broadband communications

Cable reverse path

Communications test equipment

Radar and satellite subsystems

Power amplifier linearization